Paul Coteus

One of the chief engineers behind BlueGene/L, which rocked the world of supercomputing when it was introduced in 2004 and quickly earned the title "fastest computer in the world," Coteus led the system packaging of BlueGene for more than a decade and has served as Chief Engineer. A 2012 IBM Fellow, he has tackled some of the thorniest technical challenges in the field of high performance computing. An Illinois native and son of a tool and die maker, he graduated from Bradley University with a degree in Physics.

After receiving his Ph.D. in Physics at Columbia University, he became Assistant Professor of Physics at the University of Colorado, Boulder and spent the next seven years immersed in elementary particle physics research. After joining IBM T.J. Watson Research Center as Research Staff Member in 1988, Coteus became the company's foremost expert in systems packaging, a field in which he earned many of the 119 patents to his credit. He managed the Systems Packaging Group from 1994, where he directed and designed advanced packaging for high speed electronics, including I/O circuits, memory system design and standardization of high speed DRAM, and high performance system packaging.

His packaging innovations for the BlueGene system, which won IBM the National Medal of Technology in 2009, were crucial to the power efficiency and reliability of a supercomputer that operates at a mind-boggling top speed of 210 trillion floating point instructions a second. The BlueGene/L design—which bundled together 100,000 processors and 7 million memory chips—presented a daunting packaging problem, which Coteus solved with several key innovations, including a clever design that minimized external cabling.

He has remained a core architect for subsequent generations of the system including BlueGene/Q, which was announced the prior year and held the number one position on the Green500 list of most energy efficient supercomputers. Coteus has been a senior member of the IEEE, a member of IBM's Academy of Technology, and an IBM Master Inventor. He has authored more than 90 papers in the field of electronic packaging and holds over 100 US patents. He has worked full time on IBM's next generation Exascale computer system.