- unknown (b.)
Bio/Description
Pioneer in circuit analysis and optimization and inventor of statistical timing, Visweswariah developed techniques used in every IBM chip design—including formal circuit tuning and gate-level timing sign-off. These fundamental contributions improved performance, ensured timing correctness, combated variability, and enhanced design productivity across three generations of IBM's fastest microprocessors and most complex Application-Specific Integrated Circuits (ASICs).
He joined IBM in 1989 as a Research Staff Member at IBM's Thomas J. Watson Research Center, and in 2004 he became Manager, Circuit and Interconnect Analysis. From there, in 2009, he was named Distinguished Engineer and Senior Manager, Timing and Circuit Analysis in the Electronic Design Automation, IBM Systems and Technology Group. A widely recognized industry leader, Visweswariah was one of eight IBM employees to be named an IBM Fellow in April 2013. From September 2013, Visweswariah has served as Senior Manager, Smarter Energy and Environmental Science department, and subsequently as Director of Smarter Energy Research Institute (SERI) in the Industry Solutions Research department at IBM's Thomas J. Watson Research Center. He has also served as technology ambassador to Morocco.
He received his B.Tech. degree in Electrical Engineering in 1985 from the Indian Institute of Technology (Chennai), his M.S. degree in 1986, and his Ph.D. in 1989, both in Electrical and Computer Engineering from Carnegie Mellon University. Visweswariah has been awarded the IBM Outstanding Technical Achievement Award and two IBM Research Division awards. He holds 68 patents, has published research in more than 100 journals, and is the recipient of numerous awards including Electronic Design News' Innovator of the Year.
His research interests include modeling, analysis, timing, and optimization of circuits. Visweswariah is the author of one book and several technical papers in the field of design automation, and has served on the technical program committees of conferences such as ICCAD, ICCD, and CICC.
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Gender:
Male -
Noted For:
Pioneer in circuit analysis and optimization, he is the inventor of statistical timing; developing techniques used in every IBM chip design - including formal circuit tuning and gate-level timing sign-off -
Category of Achievement:
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