![](https://do.ithistory.org/sites/default/files/company/logo/Abelite%20Design%20Automation.jpg)
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2012 February 03
Company Description
Abelite Design Automation provides statistical timing signoff tools and consulting for digital designs.
Company provides breakthrough tools & consulting for advanced timing signoff of complex digital electronic systems for 28-to-10nm deep-submicron technologies. Company has developed new paradigms & cutting edge timing signoff methodologies, which have allowed creating new statistical tools that are superior to commercially available STA/SSTA tools. The tools prevent timing violations in critical paths that lead to silicon failure & remove timing pessimism in the rest of paths. Abelite’s unique & truly statistical tools offer: - Modeling all conceivable global/local, random/correlated sources of variations including EDA tools/flow/libraries inaccuracies/errors, PVT & geometry variations in cells, wires/vias, Double Patterning Technology (DPT), Aging Degradation (AD), Layout Dependent Effects (LDE) & FinFET - Estimating timing yield & power consumption - Achieving timing signoff with needed confidence & with taking into account the number of timing critical paths, and - Performing optional signoff at all needed PVT/RC/Via/AD/DPT corners Abelite methodology prevents silicon failure while improving design performance, power & area, obtaining best QoR & reduces TAT, Costs & TTM. Methodology & tools were verified on multiple test-cases & designs for several technology nodes. Business Value: All current designs are at risk of silicon failure due to drawbacks in conventional EDA tools & methodologies that may overlook violations in few paths with “untypical” structures & properties. At the same time, most companies use too many PVT/RC/Via corners & these corners (libraries) are pessimistically characterized for most logical & clock stages. On top, unjustified & often conservative timing derates are used along with OCV/AOCV/POCV/LOCV/SOCV timing derating methods in STA tools, which are not accurate & have multiple drawbacks. It results in risk of silicon failure in few paths & overdesigning & over-margining the majority of paths. Abelite provides new advanced tools, which are complimentary to current commercial STA/SSTA tools. Abelite will provide best-in-industry consulting in all areas of timing signoff, work with customers to specify their needs, limitations & goals. Customers decide what additional characterization of technology, designs & EDA tools they will do, what data they will share & what services they require. Abelite will provide answers to all customers’ requests including support on conventional timing derating like AOCV/POCV/LOCV. Customers are not required to change their EDA tools (it may be PrimeTime or Encounter Timing Analyzer/Tempus) & design flows. All Abelite tools & methodologies are unique & not available from other EDA vendors. There are no other such services & tools available today.
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Manufacturer:
Hardware -
Formed:
February 3, 2012 -
Founders:
Alexander Tetelbaum -
Company Website:
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Company E-mail:
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Company Address:
1217 Leisure Ln., Ste. 11Walnut Creek, CAUnited States -
CEO:
- Alexander Tetelbaum
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